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authorMichael Forney <[email protected]>2019-02-14 13:23:28 -0800
committerQuentin Carbonneaux <[email protected]>2019-03-14 10:12:55 +0100
commitf622efa05a3fbd4938d1fb09e692ae0785770bc1 (patch)
treedb5fafeb08735aa6ac3127597b61a6b149982b55 /amd64
parentb777cd6c4becf0d834f8fa549315fa11918a53be (diff)
Rearrange the fields in Ins so the bit-fields get packed together
Diffstat (limited to 'amd64')
-rw-r--r--amd64/sysv.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/amd64/sysv.c b/amd64/sysv.c
index d70e70d..86c59bf 100644
--- a/amd64/sysv.c
+++ b/amd64/sysv.c
@@ -345,7 +345,7 @@ selcall(Fn *fn, Ins *i0, Ins *i1, RAlloc **rap)
ra = alloc(sizeof *ra);
/* specific to NAlign == 3 */
al = aret.align >= 2 ? aret.align - 2 : 0;
- ra->i = (Ins){Oalloc+al, r1, {getcon(aret.size, fn)}, Kl};
+ ra->i = (Ins){Oalloc+al, Kl, r1, {getcon(aret.size, fn)}};
ra->link = (*rap);
*rap = ra;
} else {