diff options
| author | Andrew Chambers <[email protected]> | 2021-10-12 22:20:39 +1300 |
|---|---|---|
| committer | Andrew Chambers <[email protected]> | 2021-10-12 22:20:39 +1300 |
| commit | 3a203ec645f411c5f7b3cecca446262c3638c341 (patch) | |
| tree | 5e1a76d736f8fda4a596135ad90d41a388ebad97 | |
| parent | 974e600961c849e552433756fe3c2c69f1b3677a (diff) | |
Fix sqlite3 assembly.
| -rw-r--r-- | main.c | 4 | ||||
| -rw-r--r-- | test/test.sh | 2 |
2 files changed, 4 insertions, 2 deletions
@@ -498,9 +498,9 @@ static void assemblemem(Memarg *memarg, uint8_t rexw, VarBytes prefix, if (memarg->index == ASM_NO_REG) { index = 4; } else { + if (memarg->index == ASM_RSP) + lfatal("rsp cannot be used as an index"); index = regbits(memarg->index); - if ((index & 7) == 4) - lfatal("sp cannot be used as an index"); } /* If our base is a bp register, we must use the index instead. */ diff --git a/test/test.sh b/test/test.sh index a916740..e81b051 100644 --- a/test/test.sh +++ b/test/test.sh @@ -33,6 +33,8 @@ t () { t "callq *%rax" t "callq *%r10" +t "movb %r11b, (%rsi, %r12, 1)" + t "cvtsi2sd %rax, %xmm1" t "cvtsi2sd %rax, %xmm10" t "cvtsi2sd (%rax), %xmm1" |
