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authorAndrew Chambers <[email protected]>2021-10-16 14:53:48 +1300
committerAndrew Chambers <[email protected]>2021-10-16 14:53:48 +1300
commit7230c83abcf764da504b69b3433d3c9c1668e262 (patch)
tree88fef0fc367a7ffb5309de74e83cc0f9d33a29b3 /main.c
parent518b5e297a378388c0231c73c2c82638a4fb5ed6 (diff)
More documentation.
Diffstat (limited to 'main.c')
-rw-r--r--main.c17
1 files changed, 8 insertions, 9 deletions
diff --git a/main.c b/main.c
index 9ad714b..212e320 100644
--- a/main.c
+++ b/main.c
@@ -207,15 +207,7 @@ static uint8_t regbits(AsmKind k) { return (k - (ASM_REG_BEGIN + 1)) % 16; }
static uint8_t isreg64(AsmKind k) { return k >= ASM_RAX && k <= ASM_R15; }
-/* Register that requires the use of a rex prefix. */
-static uint8_t isrexreg(AsmKind k) {
- return k > ASM_REG_BEGIN && k < ASM_REG_END &&
- (regbits(k) & (1 << 3) || k == ASM_SPL || k == ASM_BPL ||
- k == ASM_SIL || k == ASM_DIL);
-}
-
-/* Compose a rex prefix - See intel manual. */
-
+/* Rex opcode prefix. */
typedef struct Rex {
uint8_t required : 1;
uint8_t w : 1;
@@ -224,6 +216,13 @@ typedef struct Rex {
uint8_t b : 1;
} Rex;
+/* Register that requires the use of a rex prefix. */
+static uint8_t isrexreg(AsmKind k) {
+ return k > ASM_REG_BEGIN && k < ASM_REG_END &&
+ (regbits(k) & (1 << 3) || k == ASM_SPL || k == ASM_BPL ||
+ k == ASM_SIL || k == ASM_DIL);
+}
+
static uint8_t rexbyte(Rex rex) {
return ((1 << 6) | (rex.w << 3) | (rex.r << 2) | (rex.x << 1) | rex.b);
}